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Important Dates:
Paper Submission Deadline:
October 25, 2016
Notification of Acceptance:
November 1, 2016
Registration Deadline:
November 10, 2016
About Changchun Normal University
About Changchun
Sponsor:
Changchun Normal University
Co-Sponsors:
*Jilin University
*Northeast Normal University
*State and Local Joint Engineering Lab. of Advanced Network and Monitoring Contral(新型网络与检测控制国家地方联合工程实验室)
Technical Co-Sponsor:
IEEE Harbin Section
Prof. Dimitrios A. Karras, PhD, Sterea Hellas Institute of Technology, Dept. Automation, Hellas, Greece

Plenary Speech I: On Load Balancing Strategies and Algorithms in the Integral Design of Survivability-supported Traffic Engineering in Multi-service QoS Networks

 

Abstract:

 

In this keynote lecture, a number of optimisation models and iterate heuristic algorithms that address the survivability-supported Traffic Engineering (TE) problem in multi-service networks for multimedia are presented. This problem is considered under the constraint of integrating load balancing strategies in the design. In such networks traffic demands with different Quality of Service (QoS) and survivability requirements (e.g. existence of a node disjoint backup path for each primary path) inhere. The optimisation models for engineering the QoS traffic with different survivability prerequisites and the Best-Effort (BE) traffic are based on special admission control/routing Mixed Integer Programming (MIP) and Linear Programming (LP) optimisation sub-problems, which are solved sequentially. LP relaxations of the MIP sub-problems are also provided, and a discussion of how to incorporate load balancing conditions is illustrated. The iterative heuristic TE algorithms are based on a modified version of the Dijkstra's algorithm. The above methods are used for the solution of the TE problem in different networks and their performance is compared. An integrated approach based on the aforementioned work, for prioritised 1:1/1+1 protection and restoration-supported TE in multi-service networks, in the case of single or multiple node/link failure(s), is also presented, under the condition of involving load balancing strategies in the design, in order to improve QoS.

 

Speaker:

Prof. Dimitrios A. Karras

   

Sterea Hellas Institute of Technology, Dept. Automation, Hellas
Psachna, Evia, zip code 34400, Greece
Web addresses:
https://scholar.google.com/citations?user=IxQurTMAAAAJ&hl=en
http://www.researchgate.net/profile/Dimitrios_Karras2
https://teiste.academia.edu/DimitriosKarras/CurriculumVitae
https://sites.google.com/site/karrasdimitriosprof/
http://dimitrioskarras.eu.pn/

 

Speaker’s Biography:

Dimitrios A. Karras received his Diploma and M.Sc. Degree in Electrical and Electronic Engineering from the National Technical University of Athens, Greece in 1985 and the Ph. Degree in Electrical Engineering, from the National Technical University of Athens, Greece in 1995, with honours. From 1990 and up to 2004 he collaborated as visiting professor and researcher with several universities and research institutes in Greece. Since 2004, after his election, he has been with the Sterea Hellas Institute of Technology, Automation Dept., Greece as associate professor in Digital Systems and Signal Processing as well as with the Hellenic Open University, Dept. Informatics as a visiting professor in Communication Systems (the latter since 2002 and up to 2010). He has published more than 65 research refereed journal papers in various areas of pattern recognition, image/signal processing and neural networks as well as in bioinformatics and more than 180 research papers in International refereed scientific Conferences. His research interests span the fields of pattern recognition and neural networks, image and signal processing, image and signal systems, biomedical systems, communications, networking and security. He has served as program committee member in many international conferences, as well as program chair and general chair in several international workshops and conferences in the fields of signal, image, communication and automation systems. He is, also, former editor in chief (2008-2015) of the International Journal in Signal and Imaging Systems Engineering (IJSISE), academic editor in the TWSJ, ISRN Communications and the Applied Mathematics Hindawi journals as well as associate editor in various scientific journals. He has been cited in more than 1500 research papers, his H/G-indices are 16/29 (Google Scholar) and his Erdos number is 5. His RG score is 30.34 ( https://www.researchgate.net/profile/Dimitrios_Karras2/).

5th International Conference on Computer Science and Network Technology
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